Verilog Repo

This is a collection of useful verilog modules and testbenches. Some have been tested on either an Icestick (Lattice iCE40HX-1k) or Digilent Zybo (Xilinx Zynq-7000)

View code here or at https://github.com/ashleyjr/Verilog

• phase_out/phase_out_tb.v
  
• phase_out/phase_out.v
  
• uart_tx/uart_tx.v
  
• uart_tx/uart_tx_tb.v
  
• cordic/cordic.v
  
• cordic/cordic_tb.v
  
• fifo/fifo_tb.v
  
• fifo/fifo.v
  
• uart2pwm/uart2pwm_tb.v
  
• uart2pwm/uart2pwm.v
  
• uart_rx/uart_rx.v
  
• uart_rx/uart_rx_tb.v
  
• uart_ice/uart_ice.v
  
• uart_ice/uart_ice_tb.v
  
• picorv32/picorv32_tb.v
  
• picorv32/picorv32.v
  
• oc8051_ice/oc8051_timescale.v
  
• oc8051_ice/oc8051_defines.v
  
• oc8051_ice/oc8051_ice_tb.v
  
• oc8051_ice/oc8051_ice.v
  
• up/up_tb.v
  
• up/up.v
  
• up2_reg_stack/up2_reg_stack.v
  
• up2_reg_stack/up2_reg_stack_tb.v
  
• clk_divider/clk_divider_tb.v
  
• clk_divider/clk_divider.v
  
• shift_and_add_multiplier/shift_and_add_multiplier_tb.v
  
• shift_and_add_multiplier/shift_and_add_multiplier.v
  
• spi_slave/spi_slave_tb.v
  
• spi_slave/spi_slave.v
  
• uart_autobaud/uart_autobaud.v
  
• uart_autobaud/uart_autobaud_tb.v
  
• switch_test/switch_test_tb.v
  
• switch_test/switch_test.v
  
• counter8/counter8.v
  
• counter8/counter8_tb.v
  
• blink/blink_tb.v
  
• blink/blink.v
  
• fibonacci_mem_uart/fibonacci_mem_uart_tb.v
  
• fibonacci_mem_uart/fibonacci_mem_uart.v
  
• oc8051/oc8051_xram.v
  
• oc8051/oc8051_divide.v
  
• oc8051/oc8051_alu_src_sel.v
  
• oc8051/oc8051_cy_select.v
  
• oc8051/oc8051.v
  
• oc8051/oc8051_alu.v
  
• oc8051/oc8051_dptr.v
  
• oc8051/oc8051_acc.v
  
• oc8051/oc8051_ram_256x8_two_bist.v
  
• oc8051/oc8051_psw.v
  
• oc8051/oc8051_xrom.v
  
• oc8051/oc8051_timescale.v
  
• oc8051/oc8051_multiply.v
  
• oc8051/oc8051_defines.v
  
• oc8051/oc8051_decoder.v
  
• oc8051/oc8051_sp.v
  
• oc8051/oc8051_indi_addr.v
  
• oc8051/oc8051_ram_top.v
  
• oc8051/oc8051_comp.v
  
• oc8051/oc8051_tb.v
  
• oc8051/oc8051_memory_interface.v
  
• oc8051/oc8051_b_register.v
  
• oc8051/oc8051_sfr.v
  
• up2_mem/up2_mem.v
  
• up2_mem/up2_mem_tb.v
  
• compare8/compare8.v
  
• compare8/compare8_tb.v
  
• up2_pc_stack/up2_pc_stack.v
  
• up2_pc_stack/up2_pc_stack_tb.v
  
• pwm_in/pwm_in_tb.v
  
• pwm_in/pwm_in.v
  
• prime/prime_tb.v
  
• prime/prime.v
  
• watchdog/watchdog_tb.v
  
• watchdog/watchdog.v
  
• up2_alu/up2_alu_tb.v
  
• up2_alu/up2_alu.v
  
• prng_parallel/prng_parallel.v
  
• prng_parallel/prng_parallel_tb.v
  
• uart2gpio/uart2gpio.v
  
• uart2gpio/uart2gpio_tb.v
  
• up2_code/up2_code.v
  
• up2_code/up2_code_tb.v
  
• parity_bit/parity_bit_tb.v
  
• parity_bit/parity_bit.v
  
• up2_fetch/up2_fetch.v
  
• up2_fetch/up2_fetch_tb.v
  
• fir_filter/fir_filter.v
  
• fir_filter/fir_filter_tb.v
  
• spi_slave_regs/spi_slave_regs.v
  
• spi_slave_regs/spi_slave_regs_tb.v
  
• pwm_out/pwm_out_tb.v
  
• pwm_out/pwm_out.v
  
• pid/pid_tb.v
  
• pid/pid.v
  
• uart_loopback/uart_loopback.v
  
• uart_loopback/uart_loopback_tb.v
  
• fm_out/fm_out.v
  
• fm_out/fm_out_tb.v
  
• timer/timer.v
  
• timer/timer_tb.v
  
• clk_div8/clk_div8_tb.v
  
• clk_div8/clk_div8.v
  
• fir_filter_core/fir_filter_core.v
  
• fir_filter_core/fir_filter_core_tb.v
  
• multiply_mem_uart/multiply_mem_uart_tb.v
  
• multiply_mem_uart/multiply_mem_uart.v
  
• up2/up2_tb.v
  
• up2/up2.v
  
• prng/prng_tb.v
  
• prng/prng.v
  
• mem_uart/mem_uart.v
  
• mem_uart/mem_uart_tb.v
  
• spi/spi.v
  
• spi/spi_tb.v
  
• vga_out/vga_out_tb.v
  
• vga_out/vga_out.v
  
• fibonacci/fibonacci.v
  
• fibonacci/fibonacci_tb.v